Researchers have made transistors with current-carrying channels shorter than five nanometres using an atomically thin semiconductor called molybdenum disulfide, or MoS₂. The devices retained a clear separation between their on and off states, despite a size at which unwanted current becomes difficult to control. The fabrication process was demonstrated on a four-inch wafer.
A transistor controls current flowing along a channel between two contacts, called the source and drain. A third electrode, the gate, uses an electric field to turn that flow on or off. As the channel shortens, the drain's field can interfere with the gate and allow current to leak through when the device should be off. A monolayer of MoS₂, consisting of a single layer of the material, gives the gate tighter control over the thin channel.
The researchers made the devices using photolithography, which patterns structures with light. They describe the process as compatible with conventional chip-manufacturing methods, allowing the thin-channel design to be fabricated on a wafer rather than assembled one device at a time.
Two measurements show how well the small devices still switched. Their on-state current was more than a million times their off-state current. Their subthreshold swing, the gate-voltage change needed to alter current tenfold near the off state, was 88 millivolts per decade. Lower values indicate sharper switching. The authors benchmark this result against silicon and other semiconductor devices at comparable physical channel lengths; it does not establish the speed or power consumption of a complete processor.
The physical channel length also distinguishes this work from a July MoS₂ study that used an atomically thin graphene edge as its gate. That earlier study demonstrated channels around ten nanometres long and used simulations to explore shorter ones. Gate size and channel length describe different parts of a transistor, so an atomic-scale gate alone does not demonstrate an equally short working channel.
The new result brings sub-five-nanometre channels into a process demonstrated across a four-inch wafer. That establishes a route for fabricating these experimental devices; it does not by itself show how reliably a factory could produce complete logic chips using them.
Sources
- Nature Communications: Wafer-scale 2D MoS₂ transistors with sub-5 nm channel length and subthreshold performance beyond the silicon limit
- Nature Communications: Earlier wafer-scale MoS₂ transistors with a self-aligned atomic-scale gate
- Representative wafer photograph by Inductiveload, public domain. The photograph shows a silicon wafer, not the experimental MoS₂ devices.