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Researchers design two circuits for fault-tolerant quantum T gates

Gold electrodes surround the horizontal opening of a NIST ion trap

In a Sept. 24 arXiv preprint, researchers present two circuits for applying a logical T gate, an operation needed for universal quantum computing, and prove that each tolerates one circuit fault under a specified model. These are theoretical designs, not a hardware demonstration.

Fault-tolerant quantum codes store a logical qubit across physical qubits and measure stabilizer checks to detect errors without directly reading the encoded information. A T gate is one of the operations these codes need for universal computation; common fault-tolerant approaches prepare and consume special “magic states” to apply it.

Kishor Bharti, Tobias Haug and Andrew Tanggara temporarily release one stabilizer check, opening an extra encoded degree of freedom in the same data block. Their two rotations create two possible branches for the encoded information: one carries the intended T rotation and the other the opposite rotation. A measurement of the check outcomes identifies the branch, and a conditional correction makes either one implement the same logical T gate.

The authors give two circuits. A fixed code uses 22 data qubits, while a second uses a 23-qubit Golay code. With ancillas prepared serially and reused after reset, the schedules peak at 33 and 32 physical qubits, respectively, assuming flexible two-qubit connectivity. These are theoretical peak-occupancy counts, not an end-to-end cost comparison or evidence of a hardware reduction.

Here, “one fault” means at most one incoming physical data error or faulty circuit location. Locations include gates, state preparation, measurement, reset and idle steps; a fault may affect the qubits involved in that operation. The guarantee is a proof under a local-stochastic noise model, not a hardware reliability result.

No noisy-circuit simulation is reported. No numerical value is given for the threshold or for the total resources needed to reach a chosen logical-error rate; both depend on a complete gate-and-timing schedule. Any comparison with magic-state methods would also need to count ancillas, retries, syndrome-extraction time and Clifford operations.

Sources